The present invention relates to a memory bus, and more particularly, to a differential bus with a self-timing transceiver.
Modern electronic devices utilize memory to store instructions and data which are necessary to make the electronics function properly. For example, in the wireless communications context, the integrated circuits used to implement wireless communications require memory for storing system parameters, configuration information, and various other types of information. One common memory type is the programmable read-only memory (PROM). PROM memory is most often used to store the initial code for starting the electronic device and for configuration information. Another common type of memory is the static random access memory (SRAM) which provides fast data storage and retrieval time and is commonly used during operation of the electronic device.
The memory can be a stand-alone integrated circuit or in other applications be integrated into a more complex single integrated circuit. For example, in the modern system-on-a-chip (SOC), these types of integrated circuits include processors, memory, and other types of functional elements. In any event, data is communicated between the memory and other functional elements by one or more memory busses. For many applications, such as portable electronic devices, low power consumption is a desirable attribute. For large configuration memories, the memory bus may consume over 30% of the total power.
Therefore, what is needed is a memory bus design for use within an integrated circuit that has reduced power consumption.